TMS320C6205ZHK200 Fixed-Point Digital Signal Processor

DSP Fixed-Point 32-Bit 200MHz 1600MIPS 288-Pin BGA MICROSTAR

Features for the TMS320C6205

• High-Performance Fixed-Point Digital Signal Processor (DSP)- TMS320C6205
  • 5-ns Instruction Cycle Time
  • 200-MHz Clock Rate
  • Eight 32-Bit Instructions/Cycle
  • 1600 MIPS
• VelociTI™ Advanced-Very-Long-Instruction-Word (VLIW) TMS320C62x™ DSP Core
  • Eight Highly Independent Functional Units:
    • Six ALUs (32-/40-Bit)
    • Two 16-Bit Multipliers (32-Bit Result)
  • Load-Store Architecture With 32 32-Bit General-Purpose Registers
  • Instruction Packing Reduces Code Size
  • All Instructions Conditional
• Instruction Set Features
  • Byte-Addressable (8-, 16-, 32-Bit Data)
  • 8-Bit Overflow Protection
  • Saturation
  • Bit-Field Extract, Set, Clear
  • Bit-Counting
  • Normalization
• 1M-Bit On-Chip SRAM
  • 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
  • 512K-Bit Dual-Access Internal Data (64K Bytes)
    • Organized as Two 32K-Byte Blocks for Improved Concurrency
• 32-Bit External Memory Interface (EMIF)
  • Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
  • Glueless Interface to Asynchronous Memories: SRAM and EPROM
  • 52M-Byte Addressable External Memory Space
• Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
• Flexible Phase-Locked-Loop (PLL) Clock Generator
• 32-Bit/33-MHz Peripheral Component Interconnect (PCI) Master/Slave Interface Conforms to:
  PCI Specification 2.2
  Power Management Interface 1.1
  Meets Requirements of PC99
  • PCI Access to All On-Chip RAM, Peripherals, and External Memory (via EMIF)
  • Four 8-Deep x 32-Wide FIFOs for Efficient PCI Bus Data Transfer
  • 3.3/5-V PCI Operation
  • Three PCI Bus Address Registers:
    Prefetchable Memory
    Non-Prefetchable Memory I/O
  • Supports 4-Wire Serial EEPROM Interface
  • PCI Interrupt Request Under DSP Program Control
  • DSP Interrupt Via PCI I/O Cycle
• Two Multichannel Buffered Serial Ports (McBSPs)
  • Direct Interface to T1/E1, MVIP, SCSA Framers
  • ST-Bus-Switching Compatible
  • Up to 256 Channels Each
  • AC97-Compatible
  • Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
• Two 32-Bit General-Purpose Timers
• IEEE-1149.1 (JTAG ) Boundary-Scan-Compatible
• 288-Pin MicroStar BGA™ Package (GHK and ZHK Suffixes)
• 0.15-µm/5-Level Metal Process
  • CMOS Technology
• 3.3-V I/Os, 1.5-V Internal, 5-V Voltage Tolerance for PCI I/O Pins